CircBench

perfboard · beginner

Wire a two-input passive audio mixer on perfboard

Learn why a passive mixer loses signal, draw its summing network, simulate one driven input, and follow a checked perfboard build with screenshots.

The app opens the current example chooser. Choose Open to create your own account copy. For this guide's exact v2, download and import the project backup if the catalog version has changed.

Trace the completed schematic, including explicit return paths, coupling and control connections.
Trace the completed schematic, including explicit return paths, coupling and control connections. Full-size detail PNG · Full context PNG

A passive mixer lets two inputs feed a common node through isolation resistors. The price is signal loss and interaction with the connected sources. Here you will draw a two-input network, study a deliberately one-source testbench, and reproduce its 10 × 8 perfboard connections. There is no battery or active buffer.

Parts: Two 10 kΩ summing resistors, one 220 nF output coupling capacitor, A100K level pot and three 6.35 mm TS jacks. The project download preserves the exact fitted parts and terminal mapping.

Before starting: have a CircBench account and use a copy for experiments. This is a software build and simulation walkthrough; the images are actual application screenshots, not photographs of assembled hardware. Every numbered step has a detail image and a link to its unmodified full context PNG. Open full size when comparing small pin labels, especially on a phone.

Draw and understand the schematic

1. Open the exact reviewed example

Use the example link above, sign in if requested, and confirm Two-input passive mixer, version 2 in Explore an example. Choose Open to create your own account copy. The link alone does not create a project. If the catalog changes, import the versioned backup above to follow this precise guide. All screenshots show the actual reviewed copy, with completed wiring as a reference for your own drawing.

Choose Two-input passive mixer, version 2, then Open to make an account copy.
Choose Two-input passive mixer, version 2, then Open to make an account copy. Full-size detail PNG · Full context PNG

2. Draw the two input branches

Inspect R1 and confirm 10 kΩ, then inspect R2’s matching value. In a new drawing, place each resistor after its own input tip. Their far ends will join at the summing node. Do not connect the two input tips directly: the resistors provide the isolation and form part of the attenuation network.

Confirm R1 and its exact value or device in Details.
Confirm R1 and its exact value or device in Details. Full-size detail PNG · Full context PNG

3. Couple the summing node to the output

Inspect C1 and confirm 220 nF. Connect the joined resistor ends to one capacitor terminal and its other terminal to the top of the level-control track. This nonpolar coupling capacitor passes changing signal while blocking DC between the summing node and output control. It does not buffer either input.

Set the input or filter capacitor C1 to the value shown; retain the intended terminal mapping.
Set the input or filter capacitor C1 to the value shown; retain the intended terminal mapping. Full-size detail PNG · Full context PNG

4. Finish the level control and returns

Fit the schematic. Connect the pot bottom to common return and its wiper to output tip. Join all three jack sleeves to the same return. Trace both separate input paths before their junction. Use wires that terminate on actual pins or junctions, not a crossing that only appears to join.

Trace the completed schematic, including explicit return paths, coupling and control connections.
Trace the completed schematic, including explicit return paths, coupling and control connections. Full-size detail PNG · Full context PNG

Configure and interpret the simulation

5. Configure the one-source experiment

Choose Simulate → Setup. Drive input A with a 100 mV-peak 1 kHz sine through 1 kΩ; load the output with 1 MΩ, level full, at 25 °C. Reference is the common return. Input B is held at zero volts by an ideal test source. This is a termination, not a battery or a second audio stream.

Configure the explicit testbench: reference, source, load, temperature and any supply/model choices.
Configure the explicit testbench: reference, source, load, temperature and any supply/model choices. Full-size detail PNG · Full context PNG
Source and load settings: retain the authored stimulus and the 1 MΩ output load.
Source and load settings: retain the authored stimulus and the 1 MΩ output load. Full-size detail PNG · Full context PNG
Review the model limits and deliberately select active approximations where the circuit uses them, then save setup.
Review the model limits and deliberately select active approximations where the circuit uses them, then save setup. Full-size detail PNG · Full context PNG

6. Confirm the DC reference

Run DC operating point and wait for current result. With zero DC source offsets, the passive network settles near zero volts. If a node floats, check jack sleeves, reference and source negative connections. There is no active bias to establish, and adding a supply would change the lesson rather than fix a missing return.

Run DC voltages before interpreting gain; inspect the current node voltages relative to the selected reference.
Run DC voltages before interpreting gain; inspect the current node voltages relative to the selected reference. Full-size detail PNG · Full context PNG

7. Read attenuation and phase

Run AC frequency response. The resistor network and terminated B input reduce the signal; the coupling capacitor affects the low end. Read the phase in its separate frame. Gain is relative to the selected input node, while generator amplitude is set before its source impedance. Keep that distinction when comparing an analytic divider with the chart.

Run the current 20 Hz–20 kHz frequency response and read the labeled gain and phase axes.
Run the current 20 Hz–20 kHz frequency response and read the labeled gain and phase axes. Full-size detail PNG · Full context PNG
Phase is part of the current small-signal response; the axes disclose hertz and degrees.
Phase is part of the current small-signal response; the axes disclose hertz and degrees. Full-size detail PNG · Full context PNG

8. Inspect the settled waveform

Run Transient waveform. The output remains a sine with lower amplitude: approximately 45 mV peak for this 100 mV generator and the stated terminations. The dashed input and solid output show attenuation, not amplification. Read several settled cycles. A sample at the cursor is not the peak of the waveform.

Run Waveform for the authored 1 kHz sine input; this is a simulated response, not a hardware measurement.
Run Waveform for the authored 1 kHz sine input; this is a simulated response, not a hardware measurement. Full-size detail PNG · Full context PNG

9. Explain what input B is doing

Reopen Setup and inspect B’s zero-volt termination. B is electrically present and loads the summing node even though its signal is zero. This explains why unplugging or changing a real source could change the mix. Save the same bench; this launch lesson does not claim to simulate two simultaneous independent audio streams.

Inspect the zero-volt termination on input B: this bench drives A only, and B still loads the summing node.
Inspect the zero-volt termination on input B: this bench drives A only, and B still loads the summing node. Full-size detail PNG · Full context PNG

Build the physical layout

10. Orient the 10 × 8 perfboard

Open Perfboard build and Fit board to window. Ten columns and eight rows give labeled holes A1–H10. The finished example is a reference for reproducing the layout. Individual pads start isolated; their proximity cannot substitute for an explicit copper or wire connection. Internal r3c5 corresponds to displayed C5.

Start from the reviewed board: check its size, component face and labeled contacts.
Start from the reviewed board: check its size, component face and labeled contacts. Full-size detail PNG · Full context PNG

11. Fit the resistors and capacitor

R1 spans B1–B5, R2 D1–D5 and C1 C5–C7. Confirm both fitted resistors remain 10 kΩ and C1 is 220 nF. Their summing ends align at column 5 but are not joined merely by alignment. Keep the output side of C1 at C7 for the level-control harness.

Inspect R1's fitted package and the exact board contacts; logical pins and physical terminals stay distinct.
Inspect R1's fitted package and the exact board contacts; logical pins and physical terminals stay distinct. Full-size detail PNG · Full context PNG

12. Create the summing and return paths

On the copper face, add B5 → C5 → D5 as one summing solder path. Join the return pads G1 through G4 with the authored return path. The copper view mirrors the component face, so use labels. A solder path joins intervening pads; an insulated jumper only joins its intended endpoints.

Trace copper, explicit solder paths or breadboard groups; a visual crossing is not a connection.
Trace copper, explicit solder paths or breadboard groups; a visual crossing is not a connection. Full-size detail PNG · Full context PNG

13. Connect all three jacks and the pot

Input tips go to B1 and D1, sleeves to G1 and G2. Pot top goes to C7, bottom to G4 and wiper to E9; output tip also attaches to E9 and output sleeve to G3. Follow the complete schedule below. Keep panel terminals distinct from pads even when the rendered hardware sits beside the board.

Exact reviewed connection schedule

The following tables come from the same versioned backup. Terminal identities belong to the fitted part; letter/number contacts belong to the board. In the copper view the picture mirrors, but these labels retain their identity.

PartLogical terminal → board contact
R11 → B1; 2 → B5
R21 → D1; 2 → D5
C11 → C5; 2 → C7
J1T → B1; S → G1
J2T → D1; S → G2
J3T → E9; S → G3
RV11 → G4; 3 → C7; W → E9
Insulated connectionEndpoint AEndpoint B
Solder pathContacts in order
1B5 → C5 → D5
2G1 → G2 → G3 → G4
Connect the off-board jack sleeves, tips and any level or power hardware to the exact modeled endpoints.
Connect the off-board jack sleeves, tips and any level or power hardware to the exact modeled endpoints. Full-size detail PNG · Full context PNG

Check, repair and preserve the project

14. Run a fresh independent wiring check

Choose Check wiring and wait for the completed match. CircBench extracts the represented board connections independently and compares them with the schematic. If your copy differs, reveal each reported open or short, verify both endpoints and check unplaced parts or fitted mappings. A previous or pending result is not a fresh match.

Run a fresh Check wiring: the actual board connections match the schematic.
Run a fresh Check wiring: the actual board connections match the schematic. Full-size detail PNG · Full context PNG

15. Introduce a deliberate wiring fault

Select and delete the B5–C5–D5 summing solder path on the copper face. Run Check wiring again. The resulting open separates resistor/capacitor contacts that still look neatly aligned. Reveal the finding and trace the isolated pads. The correct schematic cannot supply copper that is absent from the physical build.

Remove the identified connection or cut and run a new check: this deliberate fault must be reported.
Remove the identified connection or cut and run a new check: this deliberate fault must be reported. Full-size detail PNG · Full context PNG

16. Undo the fault and prove the repair

Choose Undo to restore the deleted connection or cut. Run Check wiring again and wait for a fresh match. Undo alone is not verification: the completed check proves the represented topology was restored. Keep this repaired version for the following persistence and download checks.

Undo the deliberate fault and run Check wiring again; confirm a fresh matching result.
Undo the deliberate fault and run Check wiring again; confirm a fresh matching result. Full-size detail PNG · Full context PNG

17. Save, reload and check again

Wait for the normal save indicator, then reload the page. Open the same build and run Check wiring again. Confirm a fresh match after reload. If saving reports a problem, open save recovery and export a backup; do not assume remote account storage succeeded merely because the editor still displays the project.

Reload the saved project and run a fresh wiring check to verify the restored layout survives.
Reload the saved project and run a fresh wiring check to verify the restored layout survives. Full-size detail PNG · Full context PNG

18. Inspect and export the parts list

Open Bill of materials, review the fitted parts, values and quantities, then use Export CSV. Compare it with the versioned parts list above. A BOM lists represented parts; it does not select manufacturer voltage ratings or prove that a purchased package has the same terminal order. Resolve substitutions before physical assembly.

Open Bill of materials and download the project-derived parts list.
Open Bill of materials and download the project-derived parts list. Full-size detail PNG · Full context PNG

19. Export a portable project backup

Open project Settings, go to backup and choose Export project. Keep the resulting .circbench.json file. This preserves the schematic, fitted build, definitions and saved bench/model settings. Raw simulation vectors and uploaded audio are separate outputs and are not retained in this project backup.

Export a self-contained .circbench.json backup from project Settings.
Export a self-contained .circbench.json backup from project Settings. Full-size detail PNG · Full context PNG

20. Import the backup and recheck

Return to Projects and Import the backup file. The imported copy appears in your library; explicitly Open its schematic, then its build. Run Check wiring and confirm a new match. If an import is rejected, keep the original file and compare its schema/version with the app rather than editing integrity fields by hand.

Import the backup into a new account copy and recheck its build; the exact connections still match.
Import the backup into a new account copy and recheck its build; the exact connections still match. Full-size detail PNG · Full context PNG

What this result establishes

This is a one-driven-input model with B ideally terminated at zero volts. It demonstrates neither two-stream playback nor buffering, galvanic isolation, gain or compatibility with arbitrary powered outputs.

The screenshots show current solver results and fresh wiring checks for this exact example version. They do not assert that hardware was assembled, measured or qualified. Use the supplied source, load and stimulus settings when comparing results.

CircBench authored this standard resistive summing teaching circuit and independent perfboard layout. Use the exact v2 backup to preserve its source/load choices and physical harness.

Your next project

Explore a different passive loading problem in the treble-cut guide, or add active gain with the breadboard boost.